1. Field
Methods, devices, and articles of manufacture consistent with the present disclosure relate to an all-digital phase-locked loop (ADPLL), and more particularly, to a digitally controlled oscillator (DCO) for adaptively controlling a closed-loop bandwidth according to whether a phase of a feedback signal of the ADPLL changes within a search window, the ADPLL including the DCO, and devices including the ADPLL.
2. Description of Related Art
A phase-locked loop (PLL) is a control circuit that generates an output clock signal having a phase related with a phase of an input clock signal. The PLL is widely used in wireless communication devices, computers, and other electronic devices.